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National Repository of Grey Literature 1 records found  Search took 0.01 seconds. 
Modernization of the I/O simulator for PLC
 Veselý, Petr ; Jirgl, Miroslav (referee) ; Štohl, Radek (advisor)
This thesis deals with the reconstruction of an I/O simulator for PLC. The content of the first chapter is an introduction to the PLC and a description of the standardization of discrete and analog signals. Subsequently, the physical simulator located in the laboratory is described. The next part of this thesis is devoted to the design of the modification of the analog inputs and outputs in order to communicate properly with the modules. Further, the modification of the analog outputs on the simulator and also the modification of the cables between the PLC and the simulator are presented. In the fifth chapter I describe the Add Profile technology and then present the solution of the demonstration and test problem. Finally, I describe the verification of the functionality of all simulators.
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