National Repository of Grey Literature 7 records found  Search took 0.02 seconds. 
Architecture of System for Dynamically Reconfigurable Communication Terminal
Kloub, Jan
This paper describes possibilities of computing architecture implementation for dynamic data path generation for stream computation. An application example for this computing architecture is implementation of communication terminal described in this paper. The computing architecture is implemented on FPGA circuits supporting dynamic reconfiguration. FPGA functionality can be fully or partially changed during runtime when part of FPGA is static and part dynamic. Reconfiguration process is controlled by a microprocessor. The microprocessor could be implemented in FPGA static part (soft processor) or using an external integrated circuit.
Accelerator for Decoding Convolution and Reed-Solomon Code
Kloub, Jan ; Heřmánek, Antonín
Paper describes implementation of hardware accelerators for decoding convolution and Reed-Solomon code and using accelerators in Matlab.
Simulátor fyzické vrstvy ADSL
Mazanec, Tomáš
This paper presents simulation results accomplished within ADSL toolbox, which was developed in our institute. The toolbox simulates physical layer of ADSL communication chain, where the main efforts are given to equalization techniques at receiver, proper channel partitioning at transmitter and channel modeling.
Simulation of TEQ equalizers in ADSL toolbox: experiment results
Mazanec, Tomáš ; Heřmánek, Antonín
This report presents simulation results of ADSL time domain equalizers (TEQ) in our toolbox. Conclusions discuss "water-filling" bitload algorithm and compare it to others.
ADSL - equalization techniques
Mazanec, Tomáš ; Heřmánek, Antonín
The work presents the state of the art in digital signal processing in ADSL physical layer. Mainly, the equalization techniques are studed. The basic and advanced equalization algorithms are presented (both in time and frequency domain) and their characteristics are discussed.
Pokročilé algoritmy pro ekvalizaci ADSL kanálu
Mazanec, Tomáš
Digital subscriber line modems equalize response of line (channel) to fight with interferences and line dispersion which down the bit-rate of transmission. Main equalization principle is “Channel shortening” which is the base for time domain equalizers (TEQ). Many TEQ algorithms have been already proposed, mainly in theoretical sense. With growth of hardware performance, more complex methods can be applied in practice. Thus a proper simulations and fast implementations are necessary to achieve this. We developed a toolbox which implements some simple and advanced time domain equalization algorithms and simulates ADSL transmission line with reference channels (loops). This paper introduces implementation details and comparison of selected equalization algorithms.

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