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Test Application Methodology Based On the Identification of Testable blocks
Herrman, Tomáš ; Plíva, Zdeněk (referee) ; Racek, Stanislav (referee) ; Kotásek, Zdeněk (advisor)
The PhD thesis deals with the analysis of digital systems described on RT level. The methodology of data paths analysis is decribed, the data path controller analysis is not solved in the thesis. The methodology is built on the concept of Testable Block (TB) which allows to divide digital component to such segments which can be tested through their inputs/outputs, border registers and primary inputs/outputs are used for this purpose. As a result, lower number of registers is needed to be included into scan chain - border registers are the only ones which are scanned. The segmentation allows also to reduce the volume of test vectors, tests are generated for segments, not for the complete component. To identify TBs, two evolutionary algorithms are used, they operate on TB formal model which is also defined in the thesis.
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Coevolution in Evolutionary Circuit Design
Veřmiřovský, Jakub ; Hrbáček, Radek (referee) ; Drahošová, Michaela (advisor)
This thesis deals with evolutionary design of the digital circuits performed by a cartesian genetic programing and optimization by a coevolution. Algorithm coevolves fitness predictors that are optimized for a population of candidate digital circuits. The thesis presents theoretical basis, especially genetic programming, coevolution in genetic programming, design of the digital circuits, and deals with possibilities of the utilization of the coevolution in the combinational circuit design. On the basis of this proposal, the application designing and optimizing logical circuits is implemented. Application functionality is verified in the five test tasks. The comparison between Cartesian genetic programming with and without coevolution is considered. Then logical circuits evolved using cartesian genetic programming with and without coevolution is compared with conventional design methods. Evolution using coevolution has reduced the number of evaluation of circuits during evolution in comparison with standard cartesian genetic programming without coevolution and in some cases is found solution with better parameters (i.e. less logical gates or less delay).
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I2C-Based Interfaces and Their Implementation Possibilities in Current ASIC Technologies
Podzemný, Jakub ; Ambrož, Jaromír (referee) ; Fujcik, Lukáš (advisor)
This work deals with implementation possibilities of I2C, SMBus and PMBus interfaces in current ASIC technologies. In first part of this work are descriptions of these interfaces considering their actual specifications and differences between them from digital and functional point of view. The analog part of this issue is for the most part ignored. Additional part is focused on comparison of selected Verilog HDL I2C/SMBus slave modules developed by ON Semiconductor company by size, function and mainly by optimization and extension possibilities. Last part of this work deals with newly designed I2C-based interfaces. New I2C slave, SMBus and PMBus slave modules are described in Verilog HDL language.
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Multiobjective Cartesian Genetic Programming
Petrlík, Jiří ; Schwarz, Josef (referee) ; Sekanina, Lukáš (advisor)
The aim of this diploma thesis is to survey the area of multiobjective genetic algorithms and cartesian genetic programming. In detail the NSGAII algorithm and integration of multiobjective optimalization into cartesian genetic programming are described. The method of multiobjective CGP was tested on selected problems from the area of digital circuit design.
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ALPS Technique in Cartesian Genetic Programming
Stanovský, Peter ; Slaný, Karel (referee) ; Sekanina, Lukáš (advisor)
This work introduces a brief summary of softcomputing and the solutions to NP-hard problems. It especially deals with evolution algorithms and their basic types. The next part involves the study of cartesian genetic programming, which belongs to the field of evolution algorithms, used mainly in the evolution of digital circuits, symbolic regression, etc. A special chapter is devoted to the studies of new technique Age layered population structure, which deals with the problems of premature convergence, which suggests the way of how the population could be divided into subpopulations split up according to the age criteria. Thanks to the maintaining of sufficient diversity, it achieves substantially better solutions in comparison to the classical evolution algorithms. This papier includes the suggestion of two ways of incorporation of the ALPS technique into CGP. In the next part of work there were carried out tests on the classic problems, that would be solved with evolution algorithms. These tests were made with and without using ALPS technique. In the part of work "Experimental results" there was discussed a contribution of using ALPS technique in CGP against the classic CGP.
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Crossover in Cartesian Genetic Programming
Vácha, Petr ; Vašíček, Zdeněk (referee) ; Sekanina, Lukáš (advisor)
Optimization of digital circuits still attracts much attention not only of researchers but mainly chip producers. One of new the methods for the optimization of digital circuits is cartesian genetic programming. This Master's thesis describes a new crossover operator and its implementation for cartesian genetic programming. Experimental evaluation was performed in the task of three-bit multiplier and five-bit parity circuit design.
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