Národní úložiště šedé literatury Nalezeno 2 záznamů.  Hledání trvalo 0.00 vteřin. 
Dynamic runtime partial reconfiguration in FPGA
Matoušek, Rudolf ; Daněk, Martin ; Pohl, Zdeněk ; Kadlec, Jiří
Runtime dynamic reconfiguration of FPGA devices has been an issue of the last decade. Although this feature permits more robust and more flexible designes and devices that posseses it are available on the market, it is not directly supported by the current design tools. This paper presents a simple design that uses true dymnamic reconfiguration for Atmel AT94K devices. The design has been implemented using a special feature of the currently available Figaro IDS5.2 tool in an innovative way.
Evolutionary techniques in physical design for FPGAs
Daněk, Martin ; Muzikář, Z.
This paper disscusses two studies of using evolutionary algorithms in physical design for FPGAs. The first study presents an adaptation of a genetic algorithm that optimises parametres of a linear delay model for Xilinx XC4000 FPGA and compares their performance to parameters optimised by hand. The second study showes implementation and performance of an adaptive technology mapping algorithm for XC4000 based on Wilsons XCS classifier system.

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