Národní úložiště šedé literatury Nalezeno 2 záznamů.  Hledání trvalo 0.01 vteřin. 
Digital signal of pressure senzors processing using CPLD
Zátura, Michal ; Fedra, Zbyněk (oponent) ; Kováč, Michal (vedoucí práce)
The goal of this bachelor’s thesis is to design electronic part of the scanning system used to measure altitude. The electronic part is designed as module connected to the development platform XC2-XL. This module is realized like PCB. The principles of the signal processing of the signal from the pressure sensor MPXH6250, particular blocks of the designed module and principle of the barometrical altitude measuring are also described in this thesis. Thesis briefly informs about designing environment Xilinx ISE, VHDL language, the principle and the application of the pressure sensors, the structure of the programmable logic device CPLD and FPGA, the development platforms XC2-XL, the Xilinx Spartan-3 Starter Kit, the programmable logic devices CPLD Coolrunner-II XC2C256 and Spartan-3 XC3S200 FPGA used on the development platforms. The very important part is to design algorithm for processing the logarithm in the digital logic and it´s implementation in VHDL language.
Digital signal of pressure senzors processing using CPLD
Zátura, Michal ; Fedra, Zbyněk (oponent) ; Kováč, Michal (vedoucí práce)
The goal of this bachelor’s thesis is to design electronic part of the scanning system used to measure altitude. The electronic part is designed as module connected to the development platform XC2-XL. This module is realized like PCB. The principles of the signal processing of the signal from the pressure sensor MPXH6250, particular blocks of the designed module and principle of the barometrical altitude measuring are also described in this thesis. Thesis briefly informs about designing environment Xilinx ISE, VHDL language, the principle and the application of the pressure sensors, the structure of the programmable logic device CPLD and FPGA, the development platforms XC2-XL, the Xilinx Spartan-3 Starter Kit, the programmable logic devices CPLD Coolrunner-II XC2C256 and Spartan-3 XC3S200 FPGA used on the development platforms. The very important part is to design algorithm for processing the logarithm in the digital logic and it´s implementation in VHDL language.

Chcete být upozorněni, pokud se objeví nové záznamy odpovídající tomuto dotazu?
Přihlásit se k odběru RSS.