|
|
Logarithmic number system and floating-point arithmetics an FPGA
Pohl, Zdeněk
An introduction to a logarithmic number system (LNS) is presented. Range and procision of this arithmetic is briefly discussed. We show that the LNS arithmetics is suitable for a FPGA implementation. A case study will compare parameters of our LNS arithmetic library to a conventional floating-point arithmetic.
|
|
|
Dynamic reconfiguration of FPGAs
Matoušek, Rudolf ; Pohl, Zdeněk ; Daněk, Martin ; Kadlec, Jiří
Dymnamic reconfiguration of FPGA devices has been an issue of the last decade. Althouth this new feature of currently available devices permits more robust and flexible designs, it has not been recognized by professionals. This paper disscussed demands placed by dynamic reconfiguration on design tools as well as on designes themselves. A case study is presented for the Atmel AT94K family and the supplied design tools, and values are provided that should aid in analyzing such designs.
|
|
|
Dynamic runtime partial reconfiguration in FPGA
Matoušek, Rudolf ; Daněk, Martin ; Pohl, Zdeněk ; Kadlec, Jiří
Runtime dynamic reconfiguration of FPGA devices has been an issue of the last decade. Although this feature permits more robust and more flexible designes and devices that posseses it are available on the market, it is not directly supported by the current design tools. This paper presents a simple design that uses true dymnamic reconfiguration for Atmel AT94K devices. The design has been implemented using a special feature of the currently available Figaro IDS5.2 tool in an innovative way.
|
|
| |
|
|
Utilization of the HSLA toolbox for the FPGA prototyping
Pohl, Zdeněk ; Líčko, M.
An innovative design-flow for DSP algorithms usign high-speed logarithmic arithmetic (HSLA) toolbox is introduced on a demo RLS lattice application. Utilization of toolbox provides effective design time shortening and it makes designer work easier. Firstly, scripts in Matlab are written and checked. From working scripts, design is decomposed in Simulink to cycle-exact simulation and rewritten in Celoxica DK1 tool. Finally, hardware is targeted from DK1 and results are compared with simulations.
|
|
| |
|
| |
|
|
Utilization of Matlab for the logarithmic processor development
Líčko, Miroslav ; Matoušek, Rudolf ; Pohl, Zdeněk
Microprocessors are using the floating-point units for the real data type manipulation. Basic research has indicated, that the logaritmic number system can offer new possibilities of implementation for the algorithms, especially for algorithms widely using multiplication, division and square root operations. In this article there's a short summary of the development, evavaluation and demonstration with the utilization of Matlab.
|
|
|
Tuning and implementation of DSP algorithms on FPGA
Líčko, Miroslav ; Pohl, Zdeněk ; Matoušek, Rudolf ; Heřmánek, Antonín
The article describes an algoritms development process for FPGA. It is shown on the example of the implementation of the QR RLS algorithm. To realise it means to perform operations such multiplication, division and square root.The research indicates, that the logarithmic arithemtic unit can reused for the real data type processing in some cases such a QR RLS algoritm.The developed prototype of logaritmic unit is tested on DSP algorithms using Matlab.
|
|
| |
host ::
RSS.