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Experimental testbed for power side channel analysis
Gajdošík, Ester ; Martinásek, Zdeněk (oponent) ; Gerlich, Tomáš (vedoucí práce)
This bachelor’s thesis focuses on the implementation of a Power side channel attack on three experimental workplaces with the implemented AES-128 encryption algorithm. For these purposes are used FPGA boards SAKURA G, SAKURA X and Chipwhisperer CW305. The theoretical part of the work is focused on the principles of side channel attacks, while the main emphasis is on power analysis and its two methods – simple (SPA) and differential (DPA). The aim of the practical part is to compare the waveforms obtained from workplaces using the TVLA (Test Vector Leakage Assessment) leakage detection methods.
Experimental testbed for power side channel analysis
Gajdošík, Ester ; Martinásek, Zdeněk (oponent) ; Gerlich, Tomáš (vedoucí práce)
This bachelor’s thesis focuses on the implementation of a Power side channel attack on three experimental workplaces with the implemented AES-128 encryption algorithm. For these purposes are used FPGA boards SAKURA G, SAKURA X and Chipwhisperer CW305. The theoretical part of the work is focused on the principles of side channel attacks, while the main emphasis is on power analysis and its two methods – simple (SPA) and differential (DPA). The aim of the practical part is to compare the waveforms obtained from workplaces using the TVLA (Test Vector Leakage Assessment) leakage detection methods.

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3 Gajdošík, Erik
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