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Stopwatch for measuring of sports events
Tajč, Martin ; Petržela, Jiří (referee) ; Hruboš, Zdeněk (advisor)
The aim of this bachelor work is the construction of the electronic stop-watch for measurement at sports events. This stop-watch is primary designed for use at firefighters competitions. The first part of the work is focused on a flowchart of the stop-watch and an analysis of its parts. Some alternative methods, which could be used during the construction, are compared. In the following part, there is an algorithm for the microprocessor applied in it described and features of programming languages are briefly compared. Next in the text, there are a detailed user manual as well as a manual for executing of the display panel. In the supplement, particular electronic schematics and printed wiring boards are included.
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Generic logic analyzer
Tajč, Martin ; Povalač, Karel (referee) ; Kubíček, Michal (advisor)
The aim of the project is to design a generic logic analyzer based on an FPGA. The analyzer should be able to analyze protocols such as I2C, SPI, RS232, RS485 and GPIO. The captured data can be observed using an embedded graphical display or using a PC. The PC can be used to control the analyzer and to save the captured data. The thesis is divided into several parts. First, the basic structure of the analyzer is described including detailed description of its particular components. Later on, the most common protocols that can be decoded using the analyzer are described. Finally, the FPGA subsystem and microcontroller application are presented together with corresponding source codes.
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Stopwatch for measuring of sports events
Tajč, Martin ; Petržela, Jiří (referee) ; Hruboš, Zdeněk (advisor)
The aim of this bachelor work is the construction of the electronic stop-watch for measurement at sports events. This stop-watch is primary designed for use at firefighters competitions. The first part of the work is focused on a flowchart of the stop-watch and an analysis of its parts. Some alternative methods, which could be used during the construction, are compared. In the following part, there is an algorithm for the microprocessor applied in it described and features of programming languages are briefly compared. Next in the text, there are a detailed user manual as well as a manual for executing of the display panel. In the supplement, particular electronic schematics and printed wiring boards are included.
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|
|
Generic logic analyzer
Tajč, Martin ; Povalač, Karel (referee) ; Kubíček, Michal (advisor)
The aim of the project is to design a generic logic analyzer based on an FPGA. The analyzer should be able to analyze protocols such as I2C, SPI, RS232, RS485 and GPIO. The captured data can be observed using an embedded graphical display or using a PC. The PC can be used to control the analyzer and to save the captured data. The thesis is divided into several parts. First, the basic structure of the analyzer is described including detailed description of its particular components. Later on, the most common protocols that can be decoded using the analyzer are described. Finally, the FPGA subsystem and microcontroller application are presented together with corresponding source codes.
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