National Repository of Grey Literature 2 records found  Search took 0.01 seconds. 
Mapping of Algorithms to FPGA Using High-Level Synthesis Tools
Kupka, David ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
This thesis deals with ways to describe hardware. It presents the methods used in the synthesis of the description and then it compares on a set of algorithms currently common low level description in VHDL with the newly emerging high-level synthesis, where a component is described at a algorithmic level in higher programming language. The object of comparison is the ratio of time required for implementation and optimality of the resulting components.
Mapping of Algorithms to FPGA Using High-Level Synthesis Tools
Kupka, David ; Martínek, Tomáš (referee) ; Kořenek, Jan (advisor)
This thesis deals with ways to describe hardware. It presents the methods used in the synthesis of the description and then it compares on a set of algorithms currently common low level description in VHDL with the newly emerging high-level synthesis, where a component is described at a algorithmic level in higher programming language. The object of comparison is the ratio of time required for implementation and optimality of the resulting components.

See also: similar author names
1 Kupka, D.
2 Kupka, Daniel
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