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On-Chip Debugger Generator
Hrbáček, Radek ; Mecera, Martin (referee) ; Hruška, Tomáš (advisor)
This bachelor's thesis deals with the design and implementation of an on-chip debugger and its connection to the hardware generated using software tools developed as a part of the Lissom project. The first part introduces the JTAG and Nexus 5001 standards, which the implemented interface complies with. The practical part includes detailed description of the developed tool and its testing. The result is a functional on-chip debugger that has been tested with the Codea processor on the FITKit educational platform.

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