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National Repository of Grey Literature 2 records found  Search took 0.02 seconds. 
Design of CMOS SC Sigma-Delta Modulator in i3t technology
 Valehrach, Ondřej ; Fujcik, Lukáš (referee) ; Koudar, Ivan (advisor)
Design step for Sigma-Delta ADC is introduced. Suitable solution for performance improvement of the original Sigma-Delta ADC, which meets new requirements on resolution of 16 bits and signal bandwidth 20-50 kHz is presented. Advantage of using multi-bit quantization and DEM DWA method reducing the linearity requirements of the internal feedback DAC is shown.
Detailed record
Design of CMOS SC Sigma-Delta Modulator in i3t technology
 Valehrach, Ondřej ; Fujcik, Lukáš (referee) ; Koudar, Ivan (advisor)
Design step for Sigma-Delta ADC is introduced. Suitable solution for performance improvement of the original Sigma-Delta ADC, which meets new requirements on resolution of 16 bits and signal bandwidth 20-50 kHz is presented. Advantage of using multi-bit quantization and DEM DWA method reducing the linearity requirements of the internal feedback DAC is shown.
Detailed record

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