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FM receiver and radio data system processing using FPGA
Petr, Ondřej ; Pirochta, Ondřej (referee) ; Maršálek, Roman (advisor)
This term paper is the second part of the dissertation FM RDS signal processing using FPGAs. In the first half of the work is processed the information needed before the actual design and implementation. These can be divided into three themes. The first theme is the received signal VHF / FM + RDS, the second one handles the problem of software radio and last topic concerns FPGAs. The second half deals with the solution implementation and receiver radio VHF / FM and bitrate optional RDS to digital form and its implementation on FPGA. This section also includes the measurement of results.
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The RDS decoder on the FPGA
Vedra, Lukáš ; Bobula, Marek (referee) ; Štohanzl, Milan (advisor)
This thesis deals with demodulation, decoding RDS messages and an FM receiver in FPGA. It is the processing of data after A/D conversion of radio stereo signal. This work contains detailed theoretical knowledge of the RDS system, of the individual types of messages, their demodulation and subsequent decoding of individual services. There is theoretically analyzed in FPGA platform and implementation of RDS System and FM receiver.
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Simulator of the FM-CW rangefinder function
Bačík, Martin ; Hála, Ondřej (referee) ; Říčný, Václav (advisor)
This thesis describes design of Simulator FM-CW range finders. It is choosing the optimal method of realization and inform about basic properties of continuous working radar. The work includes an analysis of errors in real rangefinder and a numerical estimate of the maximum error in real devices. Contains detailed block diagram of simulator FM-CW range-finder and computer simulation of function generator frequency modulated signal, demodulator. Further work includes the complete construction documents for the preparation and implementation of basic functional verification
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Softwarové rádio pro emulaci protokolů v RFID
Prachař, Petr ; Fuchs, Michal (referee) ; Derbek, Vojtěch (advisor)
This diploma thesis focuses on the design and implementation of an emulator of RFID protocols in a software defined radio. The designed emulator operates in the UHF band (860 MHz – 960 MHz). The main goal of this design is a very fast measurement of power characteristic of tag. The proposed solution is based on implementing the transmitter controls directly into the SDR. Thanks to this solution a reduction of delay between measurements occur compared to the conventional concept, when the transmitter parameters are controlled by the hosted PC. In this thesis, suitable platform based on research is chosen for implementation and also a concept of design is proposed and described herein, which is based on implementation of time critical algorithms directlyinto the software defined radio’s FPGA. The proposed solution was implemented into selected platforms and its functionality was experimentally verified.
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FM receiver and radio data system processing using FPGA
Petr, Ondřej ; Pirochta, Ondřej (referee) ; Maršálek, Roman (advisor)
This term paper is the second part of the dissertation FM RDS signal processing using FPGAs. In the first half of the work is processed the information needed before the actual design and implementation. These can be divided into three themes. The first theme is the received signal VHF / FM + RDS, the second one handles the problem of software radio and last topic concerns FPGAs. The second half deals with the solution implementation and receiver radio VHF / FM and bitrate optional RDS to digital form and its implementation on FPGA. This section also includes the measurement of results.
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|
|
The RDS decoder on the FPGA
Vedra, Lukáš ; Bobula, Marek (referee) ; Štohanzl, Milan (advisor)
This thesis deals with demodulation, decoding RDS messages and an FM receiver in FPGA. It is the processing of data after A/D conversion of radio stereo signal. This work contains detailed theoretical knowledge of the RDS system, of the individual types of messages, their demodulation and subsequent decoding of individual services. There is theoretically analyzed in FPGA platform and implementation of RDS System and FM receiver.
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|
|
Simulator of the FM-CW rangefinder function
Bačík, Martin ; Hála, Ondřej (referee) ; Říčný, Václav (advisor)
This thesis describes design of Simulator FM-CW range finders. It is choosing the optimal method of realization and inform about basic properties of continuous working radar. The work includes an analysis of errors in real rangefinder and a numerical estimate of the maximum error in real devices. Contains detailed block diagram of simulator FM-CW range-finder and computer simulation of function generator frequency modulated signal, demodulator. Further work includes the complete construction documents for the preparation and implementation of basic functional verification
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