National Repository of Grey Literature 2 records found  Search took 0.01 seconds. 
Usage of Modern Methods for Increasing Reliability of Control System Implementations
Szurman, Karel ; Mičulka, Lukáš (referee) ; Kaštil, Jan (advisor)
At avionics control and critical systems is necessary guarantee a minimal level of fault tolerance and their high reliability. On the electronic components in these devices has an undesirable influence environment conditions and mainly cosmic ray. In this paper are described the most common failure types of semiconductor components and devices together with modern methods which can be increased the system fault tolerance and its overall reliability. There are introduced aspects of the avionic systems design due to finally certification and ways to evaluate its safety. This thesis describes design and implementation of the CAN bus control system for the FPGA platform which uses the CANAerospace application protocol. Created system design is improved by the TMR architecture. Fault tolerance of both system version is tested by the SEU framework which allows using the dynamic partial reconfiguration generate an SEU failures into running FPGA design.
Usage of Modern Methods for Increasing Reliability of Control System Implementations
Szurman, Karel ; Mičulka, Lukáš (referee) ; Kaštil, Jan (advisor)
At avionics control and critical systems is necessary guarantee a minimal level of fault tolerance and their high reliability. On the electronic components in these devices has an undesirable influence environment conditions and mainly cosmic ray. In this paper are described the most common failure types of semiconductor components and devices together with modern methods which can be increased the system fault tolerance and its overall reliability. There are introduced aspects of the avionic systems design due to finally certification and ways to evaluate its safety. This thesis describes design and implementation of the CAN bus control system for the FPGA platform which uses the CANAerospace application protocol. Created system design is improved by the TMR architecture. Fault tolerance of both system version is tested by the SEU framework which allows using the dynamic partial reconfiguration generate an SEU failures into running FPGA design.

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