National Repository of Grey Literature 6 records found  Search took 0.01 seconds. 
Image sensor signal data processing
Růžička, Jakub ; Macháň, Ladislav (referee) ; Žák, Jaromír (advisor)
This diploma thesis deals with an image capturing by a CMOS image sensor and controlling of graphical LCD displays using specialized integrated circuits. A theoretical research on the topic and design of the system designed for ease of processing, transmitting and still images displaying based on this research is described in this work. The output of the work is complete the device realized.
Influence of imaging sensors properties on the quality of the quantitative phase image reconstruction
Šulc, Václav ; Antoš, Martin (referee) ; Dostál, Zbyněk (advisor)
This bachelor thesis is focused on imaging sensors noise characteristics and their impact on quantitative phase imaging. From available sensors the darkframes were acquired and analyzed. Computed data of noise standard deviation were used to simulate synthetic holograms for reconstruction of quantitative phase images. A camera Basler acA2040-180km was found to be a most suitable device for holography. The design, fabrication and testing of an effective cooling system for such a device proved to have even better noise characteristics.
FPGA IP core for Sony IMX sensor interface
Musil, Milan ; Kováč, Michal (referee) ; Kubíček, Michal (advisor)
The diploma thesis deals with the implementation of the SLVS-EC interface into the FPGA. This interface is used in new SONY’s image sensors for high-speed data transmission. The introduction contains a description of the interface, its possible configurations and comparison with the sub LVDS interface used so far. This is followed by the selection of a suitable MPSoC with the Zynq Ultrascale+ architecture with focus to its hardware resources for receiving a high/speed signal. The main part of this thesis deals with the design of receiver for the SLVS-EC interface and decoding of the data. The raw image data is then stored in external RAM. At the end of this thesis is described the chosen methods of testing partial parts and overall design.
FPGA IP core for Sony IMX sensor interface
Musil, Milan ; Kováč, Michal (referee) ; Kubíček, Michal (advisor)
The diploma thesis deals with the implementation of the SLVS-EC interface into the FPGA. This interface is used in new SONY’s image sensors for high-speed data transmission. The introduction contains a description of the interface, its possible configurations and comparison with the sub LVDS interface used so far. This is followed by the selection of a suitable MPSoC with the Zynq Ultrascale+ architecture with focus to its hardware resources for receiving a high/speed signal. The main part of this thesis deals with the design of receiver for the SLVS-EC interface and decoding of the data. The raw image data is then stored in external RAM. At the end of this thesis is described the chosen methods of testing partial parts and overall design.
Influence of imaging sensors properties on the quality of the quantitative phase image reconstruction
Šulc, Václav ; Antoš, Martin (referee) ; Dostál, Zbyněk (advisor)
This bachelor thesis is focused on imaging sensors noise characteristics and their impact on quantitative phase imaging. From available sensors the darkframes were acquired and analyzed. Computed data of noise standard deviation were used to simulate synthetic holograms for reconstruction of quantitative phase images. A camera Basler acA2040-180km was found to be a most suitable device for holography. The design, fabrication and testing of an effective cooling system for such a device proved to have even better noise characteristics.
Image sensor signal data processing
Růžička, Jakub ; Macháň, Ladislav (referee) ; Žák, Jaromír (advisor)
This diploma thesis deals with an image capturing by a CMOS image sensor and controlling of graphical LCD displays using specialized integrated circuits. A theoretical research on the topic and design of the system designed for ease of processing, transmitting and still images displaying based on this research is described in this work. The output of the work is complete the device realized.

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