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National Repository of Grey Literature 1 records found  Search took 0.02 seconds. 
Design and Development of a Hardware Accelerator of Demanding Computations with Multiple FPGAs
 Zach, Petr ; Levek, Vladimír (referee) ; Šťáva, Martin (advisor)
This master's thesis focuses on the design and development of a printed circuit board with multiple FPGA connected by a high-speed bus. The goal of the project is to design and develop a board that will be able to accelerate calculations of demanding algorithms in various applications such as image processing, machine learning, cryptography, and other algorithms from the field of digital signal processing. The first chapter introduces the field of hardware acceleration, focusing on the characteristics of chips used in this field and comparing them. The second chapter examines the possibilities of hardware accelerators on the market. The third chapter describes the conceptual design of a custom hardware accelerator. First, the conceptual design is introduced, explaining the structure of the device. Subsequently, the design of the prototype of this device and its implementation on a PCB are described in detail.
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