National Repository of Grey Literature 2 records found  Search took 0.00 seconds. 
Thermal sensors communication with CPLD using SMBUS
Tonar, Karel ; Rumánek, Jaroslav (referee) ; Kováč, Michal (advisor)
The goal of bachelor’s thesis is the introduction with two - wire circuit communication on the SMBUS, it is concretely related to alternate communication of FPGA with thermal sensors. The bachelor’s thesis also contains the choice of optimal thermal sensor, the proposal of module for measuring the temperature and proposal of programme for Programmable Logical Device. The programme processes data from the modules of temperature measurement and data are indicate on LED display. The programme makes it possible to display minimum, maximum and average temperature during certain time interval. All of programmes are implemented for logical device in VDHL language. The thermometer sends data to Personal Computer over UART interface. There is temperature displayed and storaged once again. During working on this bachelor’s thesis was used SPARTAN-3 starter board and design system Xilinx ISE 9.2i.
Thermal sensors communication with CPLD using SMBUS
Tonar, Karel ; Rumánek, Jaroslav (referee) ; Kováč, Michal (advisor)
The goal of bachelor’s thesis is the introduction with two - wire circuit communication on the SMBUS, it is concretely related to alternate communication of FPGA with thermal sensors. The bachelor’s thesis also contains the choice of optimal thermal sensor, the proposal of module for measuring the temperature and proposal of programme for Programmable Logical Device. The programme processes data from the modules of temperature measurement and data are indicate on LED display. The programme makes it possible to display minimum, maximum and average temperature during certain time interval. All of programmes are implemented for logical device in VDHL language. The thermometer sends data to Personal Computer over UART interface. There is temperature displayed and storaged once again. During working on this bachelor’s thesis was used SPARTAN-3 starter board and design system Xilinx ISE 9.2i.

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