National Repository of Grey Literature 4 records found  Search took 0.01 seconds. 
AUTOMATED TESTING OF 10GbE DEVICES
Avramović, Nikola ; Dvořák, Vojtěch (referee) ; Fujcik, Lukáš (advisor)
Tato práce se zabývá návrhem modelu pro funkční verifikaci a návrhem syntetizovatelného testru 10Gb Ethernet zařízení, které používají XGMII rozhraní. Pro popis modelu je použit programovací jazyk VHDL. Práce zahrnuje vytváření bus functional modelu a návrh testru, který se implementuje jako genericky self-test modul. Výsledný návrh umožňuje verifikaci a testování PHY a MAC vrstve. Pro implementaci testru byla použita vývojová deska DE5-Net osazena FPGA obvodem Stratix V GX od firmy Altera.
ARM Cortex M4 Development board
Volek, Lukáš ; Macho, Tomáš (referee) ; Burian, František (advisor)
In this work I aimed at designing a universal system for testing either STM32F407/417 by STMicroelectronics and later various sensors and communication buses. The result then is a main board with many specific connectors for individual buses even with connectors making all I/O pins accessible at the same time. Thanks to advanced switching regulators the power supply is capable of accepting a wide range of sources like single Li-Ion cell, pair of alkaline cells, 12V Lead battery, common wall power adapters (both DC and AC up to 15 Vpp ), USB, laboratory power supplies with multiple outputs and finally POE (Power Over Ethernet). Supply voltages are supervised by voltage comparators with an optical signalisation. (It is possible to determine the sick branch without a measuring instrument and blowing components in the most cases.) Another important parameter was a robustness of the supply and communication lines. There is a number of TVSs, chokes, and big and low ESR capacitors A PC software is intended for a basic functionality demonstration only.
AUTOMATED TESTING OF 10GbE DEVICES
Avramović, Nikola ; Dvořák, Vojtěch (referee) ; Fujcik, Lukáš (advisor)
Tato práce se zabývá návrhem modelu pro funkční verifikaci a návrhem syntetizovatelného testru 10Gb Ethernet zařízení, které používají XGMII rozhraní. Pro popis modelu je použit programovací jazyk VHDL. Práce zahrnuje vytváření bus functional modelu a návrh testru, který se implementuje jako genericky self-test modul. Výsledný návrh umožňuje verifikaci a testování PHY a MAC vrstve. Pro implementaci testru byla použita vývojová deska DE5-Net osazena FPGA obvodem Stratix V GX od firmy Altera.
ARM Cortex M4 Development board
Volek, Lukáš ; Macho, Tomáš (referee) ; Burian, František (advisor)
In this work I aimed at designing a universal system for testing either STM32F407/417 by STMicroelectronics and later various sensors and communication buses. The result then is a main board with many specific connectors for individual buses even with connectors making all I/O pins accessible at the same time. Thanks to advanced switching regulators the power supply is capable of accepting a wide range of sources like single Li-Ion cell, pair of alkaline cells, 12V Lead battery, common wall power adapters (both DC and AC up to 15 Vpp ), USB, laboratory power supplies with multiple outputs and finally POE (Power Over Ethernet). Supply voltages are supervised by voltage comparators with an optical signalisation. (It is possible to determine the sick branch without a measuring instrument and blowing components in the most cases.) Another important parameter was a robustness of the supply and communication lines. There is a number of TVSs, chokes, and big and low ESR capacitors A PC software is intended for a basic functionality demonstration only.

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