National Repository of Grey Literature 61 records found  previous11 - 20nextend  jump to record: Search took 0.01 seconds. 
Communication of USB3.0 Chip with FPGA
Špeťko, Matej ; Viktorin, Jan (referee) ; Košař, Vlastimil (advisor)
SEC6NET is an abbreviation for project Modern tools for detection and mitigation of cyber criminality on the New Generation Internet. Project is focused on research and development of means for monitoring and analysing the network flow. Probes for monitoring IPv6 networks are developed within this project. Probes are using hardware acceleration based on FPGA platform. My thesis connects two technologies: FPGA and USB. The goal is to transfer data from the FPGA microchip to PC using Cypress EZ-USB FX3 microcontroller. The first part is focused on transferring data from FPGA to FX3 microcontroller. Second part describes the modification of FX3 firmware for getting maximum throughput. The last part focuses on implementing PC application for Linux operating system. The application receives data from the probe and saves them into hard drive using PCAP format.
Implementation of the Network Traffic Filter by Microblaze in FPGA
Viktorin, Jan ; Korček, Pavol (referee) ; Kaštil, Jan (advisor)
The thesis explores the area of hardware acceleration of a software network traffic filter running inside processor MicroBlaze in the FPGA Spartan-3E. The accelerated application is widely used firewall from the Linux Kernel called iptables, more precisely its extension L7-filter. L7-filter performs lookups inside network traffic using regular expressions. Because of its significant influence on the application performance, it has been exchanged with a hardware unit controlled from the Linux Kernel. The performance has been increased more than twice.
Porting NetCOPE Platform to EDK
Palička, Jan ; Košař, Vlastimil (referee) ; Viktorin, Jan (advisor)
This bachelor's thesis deals with porting of NetCOPE to Xilinx Embedded Development Kit (EDK). Main task is to create annotation of NetCOPE hardware for using in EDK. Before implementation of annotation itself, it is necessary both to study FPGA technology, possibilities of FPGA progamming, NetCOPE platform and PSF for anotation of NetCOPE’s IP-core.
Probe for the Application Protocols Monitoring
Fukač, Tomáš ; Košař, Vlastimil (referee) ; Viktorin, Jan (advisor)
This work describes an extension of the Microprobe functionality for detection and filtering of application protocols. The Microprobe is an embedded system designed for monitoring network links at speed 1 Gb/s without loosing any packets. The detection of application protocols requires using of computationally expensive operations, especially string lookup (usually based on regular expressions). Based on the study of several protocols (SMTP, POP3, FTP, SIP) a draft of a new architecture has been created. The new architecture splits this functionality between programmable logic FPGA and processor. The FPGA performs preprocessing of network traffic consisting of a lookup for user identifiers and protocol-specific patterns. The processor verifies that it is the requested communication. The processor does not need to process the entire network traffic but only the part pre-filtered in the FPGA. The software part is extended by a module for the analysis of SMTP which allows processing of more than 5,000 network flows per second. Support for other protocols can be added by an extension of the software part.
Framework for Dynamic Partial Reconfiguration of Virtex-5 FPGA
Raček, Jakub ; Viktorin, Jan (referee) ; Matoušek, Jiří (advisor)
The thesis is focused on design and implementiation of a framework for Dynamic Partial Reconfiguration for FPGA architecture Virtex-5. The aim of the framework is to simplify creating applications with hardware accelerators using  Dynamic Partial Reconfiguration. Using this framework, a demonstration application was created for pattern-matching incoming network packets. The process of Dynamic Partial Reconfiguration is controlled by GNU/Linux type operating system, which runs on MicroBlaze processor. This also allows to run less demanding applications and the processing of packets using software.
Portation of Lawful Interception System to the Microprobe
Dražil, Jan ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
The Microprobe is an embedded device for intercepting of network communication. It is a part of the Sec6Net Lawful Intercept System (SLIS). It would be useful to run the Microprobe as a~standalone device. Without it, the microprobe requires connection to SLIS infrastructure which is a~prerequisite to run the Microprobe.  The goal of this thesis is to describe ways how to transfer SLIS to the Microprobe architecture.
Network Tasks Optimalization
Dražil, Jan ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
Nowdays, when we are running out of public IPv4 addresses, we rely on techniques that at least postpone their complete exhaustion. One of these techniques is a network address translation (NAT). Internet providers require the highest possible bandwidth from devices that perform this task. This thesis compares NAT DPDK, built on top of DPDK framework, with freely available alternatives. This work also extends NAT DPDK with Application-Level Gateway support.
Using Sensor Data to Derive Environment State
Sakin, Martin ; Korček, Pavol (referee) ; Viktorin, Jan (advisor)
This diploma thesis deals with the analysis, description and usage of sensor data from an intelligent home system. This term also describes the intelligent system BeeeOn, which provides a sensor data and the possibility of extending this system to automation tasks. This is followed by the analysis of all the measured physical quantities, their properties and their influence on humans. The results from the measured data were used to create a classifier based on deep neural networks to detect current events at home. Detected events can be used for the following automation system to help improve living conditions. At the end of this thesis are discussed the results and options to continue with this project.
DPDK for COMBO Network Cards
Vido, Matej ; Dvořák, Milan (referee) ; Viktorin, Jan (advisor)
Software framework Data Plane Development Kit provides a standard API for fast packet processing in the user space. The DPDK covers multiple devices and architectures from different vendors. The CESNET association develops the family of COMBO network cards that are able to process Ethernet traffic up to 100 Gb/s through their SZE2 interface. This thesis describes the design and implementation of the DPDK user space driver for COMBO network cards. The driver is called szedata2 and has already become a part of the DPDK mainline in the version 2.2.0 (December 2015). The thesis describes also the measurements and the accomplished results. Packets have been received and transmitted at the wirespeed of the 100 Gb/s link.
Extension of Intelligent Home by Thermoregulation Control
Köszegy, Lukáš ; Hájek, Josef (referee) ; Viktorin, Jan (advisor)
This bachelor thesis is focused on the integration of the heat regulator VPT made by the company Thermona into the system for intelligent home control called BeeeOn. In the theoretical part, the most specific components of BeeeOn system and heat regulator VPT are described. The most important part of this thesis consists of the design and implementation. It focuses on gather values measured by the VPT regulator by means of the HTTP protocol. The measured values are provided in a separate JSON data file. In these parts there are also described the necessary elements, which have to be integrated into the BeeeOn system and VPT regulator.

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6 VIKTORIN, Jiří
6 Viktorin, Jiří
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