Home > Search Results: "DDECS 2006. IEEE Design and Diagnostics of Electronic Circuits and Systems"
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National Repository of Grey Literature 2 records found  Search took 0.01 seconds. 
Simulátor chyb založený na programovatelném logickém obvodu
 Kafka, Leoš ; Novák, O.
This paper describes a simulator based an this technique and show that partial dynamic reconfiguration is an effective way of falut injection. Error-detection-code based CED circuits are used in experiments; the results of the experiments are reported.
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Metody návrhu a verifikace pro rekonfigurovatelné návrhy v obvodu Atmel FPSLIC
 Kadlec, Jiří ; Daněk, Martin
This paper describes a methodology and design flow for designs with dynamic reconfiguration in the DSP and control domain. The described design flow starts with a description an Matlab/Simulink that is converted to Handel-C and then compiled through VHDL to EDIF, and finally to FPGA configuration. The methodology and design flow are demonstrated on implementation examples with simple floating-point IP cores targetting the Atmel AT94K FPSLIC device.
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