Národní úložiště šedé literatury Nalezeno 14 záznamů.  1 - 10další  přejít na záznam: Hledání trvalo 0.01 vteřin. 
Výrobní tester
Paul, Filip ; Horský, Pavel (oponent) ; Kolka, Zdeněk (vedoucí práce)
Diplomová práce se zabývá návrhem a realizací zařízení, které slouží k ověření správnosti vnitřního elektrického zapojení ICT testerů. Správnost zapojení je ověřována měřením odporu mezi jednotlivými testovacími body. ICT testery mohou obsahovat řádově tisíce propojení. Navrhované zařízení by mělo být schopno identifikovat chyby propojení a následně navrhnout vhodné řešení.
Proudový zdroj pro elektronovou optiku
Vomela, Roman ; Horský, Pavel (oponent) ; Kolka, Zdeněk (vedoucí práce)
Tato diplomová práce se zabývá návrhem přesného proudového zdroje pro magnetickou čočku. Nejprve je vysvětlena elektronová mikroskopie, protože magnetická čočka neboli cívka, je součástí elektronového mikroskopu. Dále je vysvětlen princip řízení magnetické čočky a její vlastnosti. V další části je rozebrána problematika návrhu bipolárního proudového zdroje a požadavky na stabilitu výstupního proudu. Práce obsahuje popis schématu zapojení navrženého proudového zdroje. Nakonec je proudový zdroj zrealizován a jsou na něm naměřeny základní parametry, zejména stabilita výstupního proudu.
Saving power and area with multi-bit pulsed latches
Král, Vojtěch ; Horský, Pavel (oponent) ; Dřínovský, Jiří (vedoucí práce)
This thesis describes types of power consumption in CMOS technology and low power techniques that can be used in application-specific integrated circuits. It describes a multi-bit pulsed latch as one of the low power techniques that can be used as a better replacement for a standard multi-bit master-slave flip flop. The multi-bit pulsed latch is composed of two parts: a pulse generator and a pulsed latch. Different useful topologies are mentioned. Topologies are chosen for their optimized area and power consumption. A schematic of the multi-bit pulsed latch is designed from chosen topologies and compared to a schematic of the standard multi-bit flip flop. Required layouts of multi-bit pulsed latches are then made and compared to standard layouts of multi-bit flip flops. Those designed multi-bit pulsed latches are also simulated in a simple design.
Reverberation Reduction in Transformer-Less Ultrasonic Sensors for Parking Applications
Ledvina, Jan ; Husák, Miroslav (oponent) ; Štork, Milan (oponent) ; Horský, Pavel (vedoucí práce)
A common feature of modern car is a parking assistant that typically depends on performance of ultrasonic sensors. This doctoral thesis opens question of reverberation reduction in these sensors. Reverberation is unwanted phenomenon that prevents the sensor in short distance ranging, which is crucial in a parking application. The thesis intentionally aims on emerging transformer-less sensor solution. To address the reverberation problem different types of electric damping are studied. From the theory review it became apparent that a combination of multiple damping methods is needed. The proposed practical solution utilizes a nonlinear damping followed by a linear damping. For the linear damping an adaptive shunt tuning method was proposed to address variation in transducer parameters, which enables the system to achieve the fastest damping. To prove viability of this concept a hardware implementing the proposed damping method was developed and using this hardware the methods were evaluated.
Effective Usage of Circuits with Fractional Order in Integrated Circuits
Kadlčík, Libor ; Štork, Milan (oponent) ; Husák, Miroslav (oponent) ; Horský, Pavel (vedoucí práce)
Integration and differentiation are usually known for an integer order (i.e. first, second, etc.); however, a generalization to a fractional (non-integer) order is possible, which can be implemented by fractional-order electronic circuits (or make an approximation) and which provide a new degree of freedom for design. Approximation of fractional-order circuits with discrete components usually employs RC structures with a wide range of resistances and capacitances and appear difficult to use in integrated circuits. This work shows implementation of fractional-order circuits in integrated circuits and their use in circuit design. Lumped-element components (e.g. RC ladder) and distributed elements (e.g. R-PMOScap, consisting of unsalicided polysilicon strip above gate oxide) are used; only analog CMOS process is used, without any special processing steps. The usefulness of fractional-order circuits has been practically demonstrated by realization of several integrated voltage regulators, in which fractional-order circuits implement fractional-order regulation to achieve both tight DC regulation and a good stability of the regulation loop, without requiring a compensation zero or too large external capacitance (some of the regulators even allow a load capacitance from zero to infinity).
Signal Integrity Optimization Techniques for High-Speed Chips Signaling
Ševčík, Břetislav ; Štork, Milan (oponent) ; Horský, Pavel (oponent) ; Brančík, Lubomír (vedoucí práce)
The doctoral thesis deals with signal integrity problems in modern chip circuits. Based on the simulation and practical experiments an optimized second order pre-emphasis signaling technique is proposed. High bandwidth efficiency of signal pre-emphasis together with a minimum voltage swing during signal emphasizing and still lower power dissipation are the main features respected in the proposal. The performed analysis clearly shows that proposed pulse shaping method due to the spectral efficiency can increase the transmission bandwidth of low cost wire channels. The performance of proposed signaling technique is demonstrated on various type channels with higher order transfer function. Additional channel impairments which can occur during transmission channel design are discussed too.
Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications
Bay Abo Dabbous, Salma ; Horský, Pavel (oponent) ; Ďuračková, Daniela (oponent) ; Khateb, Fabian (vedoucí práce)
This doctoral thesis deals with designing ultra-low-voltage (LV) low-power (LP) analog circuits utilizing the unconventional CMOS techniques. Battery powered medical devices such as; long term physiological monitoring, portable, implantable, and wearable systems need to be small and lightweight. Besides, long life battery is essential need for these devices. Thus, low-power integrated circuits are always paramount in such biomedical applications. Recently, unconventional CMOS techniques i.e. Bulk-Driven (BD), Floating-Gate (FG), Quasi-Floating-Gate (QFG), Bulk-Driven Floating-Gate (BD-FG) and Bulk-Driven Quasi-Floating-Gate (BD-QFG) MOS transistors (MOSTs) have revealed as effective devices to reduce the circuit complexity and push the voltage supply of the circuit towards threshold voltage of the MOST. In this work, the most important features of the unconventional CMOS techniques are discussed in details. These techniques have been utilized to perform ultra-LV LP CMOS structures of several active elements i.e. Operational Transconductance Amplifier (OTA) based on BD, FG, QFG, and BD-QFG techniques; Tunable Transconductor based on BD MOST; Current Conveyor Transconductance Amplifier (CCTA) based on BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) based on BD MOST; Winner Take All (WTA) and Loser Take All (LTA) based on BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) based on BD-QFG technique. Moreover, to verify the workability of the proposed structures, they were employed in several applications. The performance of the proposed active elements and their applications were investigated through PSpice or Cadence simulation program using 0.18 m CMOS technology.
Převodník pro bezdrátové snímání teploty
Řežucha, Tomáš ; Horský, Pavel (oponent) ; Kolka, Zdeněk (vedoucí práce)
Práce se zaměřuje na návrh, konstrukci a měření vlastností bezdrátového napájecího modulu, který bude v navazující bakalářské práci použit k napájení bezdrátového převodníku pro měření teploty. Je provedena analýza dostupných řešení na trhu bezdrátového nabíjení, která popisuje jeho možnosti z hlediska maximálního přeneseného výkonu, rozsahu použitelnosti a účinnosti. Dále je popsána elektromagnetická rezonanční vazba mezi dvěma cívkami a také možnosti optického datového přenosu.
Inteligentní nabíječka akumulátorů
Ulver, Martin ; Horský, Pavel (oponent) ; Kolka, Zdeněk (vedoucí práce)
Bakalářská práce se zabývá inteligentním nabíjením baterií, což přispívá k jejich regeneraci a u některých typů k odstranění paměťového efektu. Jsou zde rozebrány charakteristiky nabíjení a návrh koncepce spínané nabíječky řízené procesorovou jednotkou. Dále je popsáno zatěžování, neboli vybíjení baterií a navrhnuta analogová zátěž řízená z téže procesorové jednotky. Procesorová jednotka dle zadaných parametrů a změřených veličin rozhoduje o nabíjení či vybíjení a řídí jej. Parametry jsou zobrazovány na LCD a zadávány na výrobku pomocí tlačítek.
Low Voltage Low Power Analogue Circuits Design
Alsibai, Ziad ; Horský, Pavel (oponent) ; Ďuračková, Daniela (oponent) ; Khateb, Fabian (vedoucí práce)
The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the non–conventional ones which are bulk–driven (BD), floating–gate (FG), quasi–floating–gate (QFG), bulk–driven floating–gate (BD–FG) and bulk–driven quasi–floating–gate (BD–QFG) techniques. The thesis also looks at ways of implementing structures of well–known and modern active elements operating in voltage–, current–, and mixed–mode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fully–differential second generation current conveyor (FB–CCII), fully–balanced differential difference amplifier (FB–DDA), voltage differencing transconductance amplifier (VDTA), current–controlled current differencing buffered amplifier (CC–CDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diode–less rectifier and inductance simulations, as well as low–pass, band–pass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.

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