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National Repository of Grey Literature 2 records found  Search took 0.00 seconds. 
Hardware generation of cryptographic-safe primes.
 Kabelková, Barbora ; Smékal, David (referee) ; Cíbik, Peter (advisor)
The bachelor's thesis deals with the topic of prime numbers and their generation. It briefly introduces prime numbers and points out the importance of secure primes in cryptography. It gives examples of asymmetric ciphers and closely analyses RSA algorithm. The thesis then presents some pseudo-random and true-random methods of generating sequences of numbers and compares their properties. It evaluates the most used primality tests, both probabilistic and real, based on their applicability in practice. It suggests several combinations of primality tests with generating methods and chooses one to implement on FPGA. The thesis describes the implementation of a generator that generates a sequence of numbers using the von Neumann middle-square method and subsequently uses the Miller-Rabin test to find primes between those numbers. Key processes of the proposed generator are explained and illustrated. The proposed implementation is simulated and synthesized in the Xilinx Viavado environment. The individual parts of the generator are tested using several behavioral simulations. Finally, the thesis comments on the conducted simulations and evaluates the properties of the proposed implementation.
Detailed record
Hardware generation of cryptographic-safe primes.
 Kabelková, Barbora ; Smékal, David (referee) ; Cíbik, Peter (advisor)
The bachelor's thesis deals with the topic of prime numbers and their generation. It briefly introduces prime numbers and points out the importance of secure primes in cryptography. It gives examples of asymmetric ciphers and closely analyses RSA algorithm. The thesis then presents some pseudo-random and true-random methods of generating sequences of numbers and compares their properties. It evaluates the most used primality tests, both probabilistic and real, based on their applicability in practice. It suggests several combinations of primality tests with generating methods and chooses one to implement on FPGA. The thesis describes the implementation of a generator that generates a sequence of numbers using the von Neumann middle-square method and subsequently uses the Miller-Rabin test to find primes between those numbers. Key processes of the proposed generator are explained and illustrated. The proposed implementation is simulated and synthesized in the Xilinx Viavado environment. The individual parts of the generator are tested using several behavioral simulations. Finally, the thesis comments on the conducted simulations and evaluates the properties of the proposed implementation.
Detailed record

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