Original title: Algoritmy zpracování signálu na platformě AVR32
Translated title: Signal processing algorithms on AVR32 platform
Authors: Záplata, Filip ; Fajmon, Petr (referee) ; Fedra, Zbyněk (advisor)
Document type: Master’s theses
Year: 2011
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií
Abstract: [cze] [eng]

Keywords: 3-band digital graphic equaliser; architecture Atmel AVR32; AVR32 Framework; CORDIC algorithms; development environment AVR32 Studio; DSP-lib; evaluation board EVK1100; FreeRTOS; microarchitecture AVR32UC; microcontroller AT32UC3A0512; on-chip debugging tool JTAGICE mkII; pitch-scale effect; STFT analysis/synthesis; 3-pásmový digitální grafický ekvalizér; architektura Atmel AVR32; AVR32 Framework; CORDIC algoritmy; DSP-lib; efekt pitch-scale; FreeRTOS; mikroarchitektura AVR32UC; mikrokontrolér AT32UC3A0512; programátor JTAGICE mkII; STFT analýza/syntéza; vývojová deska EVK1100; vývojové prostředí AVR32 Studio

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/7139

Permalink: http://www.nusl.cz/ntk/nusl-578809


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Master’s theses
 Record created 2024-04-02, last modified 2024-04-03


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