Original title:
Hardware-Accelerated Cryptography For Software-Defined Networks
Authors:
Cíbik, Peter Document type: Papers
Language:
eng Publisher:
Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií Abstract:
This paper presents a Software-Defined Network (SDN) cryptographic solution targetedon high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution providesa fast alternative method to develop network-oriented data processing cryptography applications foran accelerator. A high-level programming language – Programming Protocol-independent PacketProcessor (P4) – is used to avoid a complex and time-consuming hardware development. The solutionconsists of two main parts: a library of mainly used cryptographic primitives written in VHSICHardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function(SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signaturescheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDLwith the support for these cryptographic components as external objects of P416.
Keywords:
Cryptography; FPGA; Hardware acceleration; P4; Software-Defined Networks; VHDL Host item entry: Proceedings II of the 27st Conference STUDENT EEICT 2021: Selected papers, ISBN 978-80-214-5943-4
Institution: Brno University of Technology
(web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library. Original record: http://hdl.handle.net/11012/200826