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Original title:
Prototyping of DSP algorithms on FPGA
Authors:
Líčko, Miroslav
;
Tichý, Milan
;
Heřmánek, Antonín
;
Matoušek, Rudolf
;
Pohl, Zdeněk
Document type:
Papers
Conference/Event:
International Student Conference on Electrical Engineering /6./
, Praha (CZ), 2002-05-23
Year:
2002
Language:
eng
Abstract:
Poster describes an algorithm development process for FPGA. The process is shown on the example of an implementation of the QR RLS algorithm.
Keywords:
DSP
;
floating-point
;
FPGA
Project no.:
CEZ:AV0Z1075907
(
CEP
),
LN00B096
(
CEP
)
Funding provider:
GA MŠk
Host item entry:
POSTER 2002
Institution:
Institute of Information Theory and Automation AS ČR (
web
)
Document availability information:
Fulltext is available at the institute of the Academy of Sciences.
Original record:
http://hdl.handle.net/11104/0130953
Permalink:
http://www.nusl.cz/ntk/nusl-34927
The record appears in these collections:
Research
>
Institutes ASCR
>
Institute of Information Theory and Automation
Conference materials
>
Papers
Record created 2011-07-01, last modified 2024-01-26
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