National Repository of Grey Literature 216 records found  beginprevious84 - 93nextend  jump to record: Search took 0.01 seconds. 
Analysis of Real-Time Operating System Kernels Running on FITkit
Rajnoha, Peter ; Šimek, Václav (referee) ; Strnadel, Josef (advisor)
The project is dedicated to the identification of the problems found while building RT operating systems for use in embedded devices. The project's main topic is the possibility of using RT system in the FITkit platform and it also discusses individual problems and their possible solutions. One of the problems is the way of acquiring the timing information for tasks to ensure their RT properties. We have extended existing simulator for given microcontroller that is also part of the FITkit. The simulator can be used for detailed monitoring of the execution of individual tasks in the system based on dynamic analysis, collecting timing statistics for given blocks of the program or it can be extended by new modules. The RM scheduling mechanism has been integrated into the FreeRTOS system as an example by considering the knowledge of the concrete operating system and acquired timing information.
Generator of Music and Sound Effects
Vaňků, Nikita ; Musil, Petr (referee) ; Zemčík, Pavel (advisor)
The aim of this work is to design digital synthesizer and modulator on embedded sys- tems. Work is exploring existing digital synthesizer and modulators in embedded systems and PC and with that gained knowledge is presenting possible solution of design on Field Programmable Gate Array.
x86 Assembler Simulator for Education
Heštera, Andrej ; Semerád, Lukáš (referee) ; Orság, Filip (advisor)
Point of this thesis is gain knowledge base of x86 Instruction Set Architecture and x86 assembly language through analysis. Based on this knowledge, design and implement simulation environment in object oriented programming language Java SE8. This environment will give user option to create code based on conventions and syntax of Netwide Assembler and simulate created code on virtual representation - simulation model, which will imitate behavior of processor implementing instruction set architecture x86. The result of using this environment should be new knowledge for user about basic function of machine code execution and how this execution alters state of processor, without the need to specially compile created code for use in Debugger and having physical system implementing architecture x86.
Automation of measurement of transmission properties of DSL modems
Pokorný, Lukáš ; Šedý, Jakub (referee) ; Šilhavý, Pavel (advisor)
The work deals with transmission parameters of DSL systems and software development for the automated measurement. The first part is devoted to the transmission medium and modulation techniques. The following describes the detailed functions and features of ADSL2+ modems. Integral part of the work is the overview of the ITU test methodology, together with parameters of test loops and types of interference. Within the automation of measurement are described used Spirent simulators DSL414E and DLS8234 and important communication commands. The practical part is devoted to designing applications for control simulators and software for automated measurement. For implementation of algorithms and creation of graphical interface is used C++ programming language. Finally the results of measuring the transmission properties of ADSL and VDSL systems executed by created application are presented.
Object Position from Multiple Cameras
Dostál, Radek ; Herout, Adam (referee) ; Hradiš, Michal (advisor)
This thesis deals with reconstruction of golf ball position using multiple cameras. Reconstruction will be used for golf simulator project. System is using fotogrametric calibration and triangulation algorithm for obtaing point coordinates. Work also discuss options for camera selection. The result is making of prototype of the simulator.
Simulator of production lines
Viták, Jan ; Kaczmarczyk, Václav (referee) ; Pásek, Jan (advisor)
The aim of this master’s thesis Simulator of Production Lines is to design a concept of the simulator of conveyor production lines with focus on testing control software for PLC and to implement this simulator. The thesis includes description of ready to use solutions available on the market, description of PLC control algorithm to be tested, designed concept of the simulator, description of the implemented software, demonstration of the simulator on a specific task and evaluation of its capabilities.
A review of hip joint replacements in terms of wear
Vaverka, Pavel ; Ficza, Ildikó (referee) ; Nečas, David (advisor)
This bachelor thesis provides an overview of influence of materials, diametral clearance and head diameter on wear of total hip replacement. First part of the thesis deals evolution of hip joint replacements. Wear measurement methods and commercially available hip joint simulators are described in the following chapter. The main part of this thesis is analysis of important studies dealing with influence of hip replacement design on volumetric wear.
Panasonic FX7 Digital Cameras Simulator and Trainer
Urban, Petr ; Drozdová, Martina (referee) ; Kunovský, Jiří (advisor)
My thesis is focused on the creation of materials which should be used at the University of the third age. I worked with camera Panasonic LUMIX FX7 to which I created a user manual and also a simulator which simulates the functions of this camera. The simulator and the user manual could be used as training materials as well as materials to demonstrate this camera, for instance on promotions.
Usage of Fiscal Policy in the Economic Instruments Simulator
TUPÝ, Jakub
This work includes a description of fiscal policy and its utilization in an economic movement simulator. Firstly, it provides an overview of fiscal policy, its strategies, and tools that the government employs to maintain stable economic growth. The theoretical knowledge acquired during the research was then applied in the practical part of the bachelor's thesis. In this section, a diagram was created to illustrate the options available to the simulator's users before proceeding to the next quarter. Additionally, random events are generated and displayed to the users during the simulation process. Each event is accompanied by its theoretical description, the text displayed to the users, its impact on GDP, unemployment, and inflation, which are the main indicators in the simulator, as well as a description of the most effective solutions using fiscal policy tools, complemented by tables with all their combinations. The practical part also contains a general description of the simulator, a description of its passage, a mathematical formula for calculating future values and a visual aspect to give the reader a comprehensive idea of how the simulator works and looks.
Graphical Simulator of Superscalar Processors
Horký, Jakub ; Šimek, Václav (referee) ; Jaroš, Jiří (advisor)
In this thesis, I firstly focus on functional units inside processors and how they are interconnecetd in scalar and superscalar processor. Then, I describe the memory hieararchy with focus on caches. Next, I describe how compilers do translation from higher level language into assembly. Then, I have a look at available processor simulators and cache simulators and more closely describe the simulator that this thesis is based on. Thanks to the information from the analysis, I propose possible extensions to the simulator by adding memory subsystem, compiler and gathering more statistics. In the end, I have a look at my implementation and investigate possible benefits to the "Computation Systems Architectures" lectures

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