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Evolutionary Design of Quantum Operator
Kraus, Pavel ; Mrázek, Vojtěch (referee) ; Bidlo, Michal (advisor)
The goal of this thesis is to utilize various evolutionary algorithms for quantum operator design in the form of unitary matrices in direct representation. Evolution strategy, differential evolution, Particle Swarm Optimization and artificial bee colony algorithms were chosen. In this thesis, the third and fourth algorithms were used for the first time in relation to quantum operator design. The experiments have shown that the utilization of direct representation gives results of acceptable quality.
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Monitoring of Temperature for Small Buildings
Handzuš, Jakub ; Wiglasz, Michal (referee) ; Mrázek, Vojtěch (advisor)
The aim of this thesis is to design and implement an IoT system for monitoring the air temperature of smaller objects, e.g households. As the system is to be financially available to the wider public, it needs to be fully functional even at low procurement and operating costs - based on this requirement, it is necessary to analyze available alternatives for operating the systems. When selecting the appropriate technology for storing the acquired data, it is necessary to take into account the operations most frequently performed on the data - for this reason, a set of experiments is carried out on several types of database systems. Based on the findings gathered during analysis and experimentation, the optimal solution appears to be the combination of a generic database with web host services. In the resulting system, the sensor sends the acquired data to the server with a database, whilst the processed data is subsequently interpreted by the client-side visualizations.
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Using Machine Learning for Improvement of Location Estimation in Wireless Positioning System
Matuš, Adam ; Mrázek, Vojtěch (referee) ; Šimek, Václav (advisor)
This thesis describes the Sewio platform and the communication techniques of the ultra-wideband technology standard, which the platform uses to determine the position of objects. The technology is based on measuring signal arrival time intervals and multilateration using time differences. The platform generates and stores historical data from past positioning of objects. The dataset consists of sequences of position data which, in addition to the monitored environment, contain relevant signal parameters of wireless communication. A system of machine learning techniques based on Gaussian models and linear regression was implemented to classify and predict real-time position data with the goal of improving position estimation stability and robustness. The system functions as a downstream component, which accepts RTLS position data and outputs improved position estimates. The evaluation results show that the implemented system can successfully improve position stability and robustness.
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Compact System for Autonomous Meter Reading
Podeszwa, David ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
This work solves the problem of the insufficient range of WMBUS meters, which makes their reading still difficult. The developed implementation solves this problem by using a battery-powered device that extends this range by using a LoRaWAN network, where the data received from the meters is sent over this network for further processing. The created device is capable of receiving WMBUS frames and sending them for a minimum period of 9 years. The main benefit of this work is the implementation of such a device on the new STM32WL platform, which is unique due to its integration of a microprocessor and a Sub-GHz receiver inside one chip.
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Design of erosion and flood control measures in the study case area responding to climate change
Mrázek, Vojtěch ; Larišová,, Lucie (referee) ; Sobotková, Veronika (advisor)
The aim of the work is to design anti-erosion and flood protection in the area of interest KÚ Lukavec to the current state and responding to climate change. At the same time, it is necessary to assess the degree of erosion threat to the soil and analyze runoff conditions in critical areas. The introductory part summarizes information about the studied area and methods for calculation. The erosion analysis is processed in the design part and suitable anti-erosion and anti-flood measures will be proposed. DesQ-MaxQ software was used to calculate the runoff conditions, graphical outputs and analysis of erosion conditions were created in the ArcGIS environment.
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Movement Abnormalities Classification using Genetic Programming
Chudárek, Aleš ; Mrázek, Vojtěch (referee) ; Drahošová, Michaela (advisor)
When suppressing the symptoms of Parkinson's disease, the correct dosage of drugs is critical for the patient. Improper dosing can either cause insufficient suppression of symptoms or, conversely, side effects, such as dyskinesia, occur with high doses. Dyskinesia is manifested by involuntary muscle movement. This work deals with the automated classification of dyskinesia from motion data recorded using a triaxial accelerometer located on the patient's body. In this work, the classifier of dyskinesia is automatically designed using Cartesian genetic programming. The designed classifier achieves very good quality of classification of severe dyskinesia (AUC = 0,94), which is a comparable result to the techniques presented in scientific literature.
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Acceleration of Symbolic Regression Using Cartesian Genetic Programming
Hodaň, David ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
This thesis is focused on finding procedures that would accelerate symbolic regressions in Cartesian Genetic Programming. It describes Cartesian Genetic Programming and its use in the task of symbolic regression. It deals with the SIMD architecture and the SSE and AVX instruction set. Several optimizations that lead to a significant acceleration of evolution in Cartesian Genetic Programming are presented. A method of a bit-level parallel simulation that uses AVX2 vectors allows to process 256 input combinations of a logic circuit in paralell. Similarly it is possible to use a byte-level parallel simulation and work with 32 bytes when evolving an image filter. A new method of batch mutation can accelerate the evolution of combinational logic circuits thousand times depending on the problem size. For example, using a combination of these and other methods the evolution of 5 x 5b multipliers took 5.8 seconds on average on an Intel Core i5-4590 processor.
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A Generator of Arithmetic Circuits
Klhůfek, Jan ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The aim of this bachelor thesis is to present the design and implementation of an arithmetic circuit generator. The generator focuses on generating various output representations of arithmetic circuits in flattened and hierarchical forms using the Python programming language. The work first deals with the specification of HW structures of individual arithmetic circuits and the corresponding ways of describing these structures into various representations. Followed by an introduction to the concept and details of the implementation of a tool called ArithsGen, which is able to generate arithmetic circuits and export them to various output representations. The output representations are then used for fast and simple simulation of the designed circuits (C), to describe the hardware structures and perform logic synthesis (Verilog), to formal verify the designs (BLIF) or to globally optimize the circuits using the evolutionary strategy (CGP). Finally, the generated representations were individually tested and compared with each other using the results obtained from logic synthesis.
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Intelligent Access Control System for Large Facilities
Truhlář, Jan ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
Aim of this work is to create autonomous embedded device which allows access control with radio frequency identification (RFID). Device is configurable by web interface and offers access history. Updates of RFID cards database are realised by mesh network. For realisation of this work is used developement kit based on Espressif Systems ESP8266 chip, which is programmed with open-source platform Arduino. Created device can be used in locations without direct network covrage.
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Approximation of Digital Circuits in Yosys Tool
Plevač, Lukáš ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The goal of this work is introduction of cgploss extension. This extension is extension for combinational logic circuits optimization in Yosys tool. Cartesian genetic programming is introduced in the first part of this work. Cartesian genetic programming is a design and optimization method that can be used for circuit optimization and approximation. This chapter introduces representation of combinational logic circuits for Cartesian genetic programming. The next chapter introduces Yosys tool and possibilities of the Yosys extending. The proposed 'cgploss' extension is introduced in the next chapter. The chapter also provides details about the implementation and the usage. The last chapter tests cgploss extension and compares representation of combinational logic circuits.
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