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Creep Behaviour of High-Density Polyethylene (HDPE)
Patzelt, Petr ; Přikryl, Zdeněk (referee) ; Petrůj, Jaroslav (advisor)
The theoretical part of the thesis deals with the summary of material properties and testing parameters that influence SCG process. The experimental part is aimed on the comparison of different condition effects on the process of FNCT and PENT. Chosen temperatures for PENT were 70; 80 and 90 °C and the applied nominal stress 2,0; 2,4 and 2,8 MPa. In the case of FNCT the chosen temperatures were the same and the ligamental stress was 4 MPa for all used environments which were: water, Arkopal N110 solution and Dehyton PL solution. In addition, several experiments were measuered under applied nominal stresses 3; 4; 5; 6; 8 a 10 MPa and at 80 °C in Arkopal N110 solution. The morphology of crack surfaces was studied afterwards. The obtained data were used for evaluaion by a five parameter equation.
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Compilation of C++ Applications for Embedded Devices
Nosterský, Milan ; Přikryl, Zdeněk (referee) ; Hruška, Tomáš (advisor)
This master's thesis deals with the integrations of C++ programming language and its standard C++11 into the compiler for embedded systems. This compiler is based on LLVM project and it is generated from Codasip Studio. Codasip Studio is tool for design of the aplication specific processor cores, it is also allows generate compiler, which is based on the description of semantics section in processor's instruction set for any target processor architecture. C++ is programming language based on the C, which is extended by object oriented design and many other features. C++ language allows writing of very effective code on high level of abstraction. Funcionality of implementation is tested on testsuite in last phase of master's thesis.
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Application for Detection of Plagiarism
Kačic, Matej ; Přikryl, Zdeněk (referee) ; Lukáš, Roman (advisor)
Main goal of this thesis is to create application, which can detect plagiarism in program code of projects without skeleton. It describes constructions of C/C++ language and their usage for detection of plagiarism. Projetcs are analysed by preprocesor, lexical analyse and phase of making structure of compare. After that they are compared one to each another by statistical test and Body test depends on Longest common subsequence.
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Debugger for Generic Microprocessor Simulators
Wilczák, Milan ; Husár, Adam (referee) ; Přikryl, Zdeněk (advisor)
Application specific instruction set processors become part of every day life although it's not always visible at first sight. During their development it's needed to somehow describe their architecture, instruction set and behavior. To make their developement worth, it's necessary to be able to create applications for these processors and during application development errors are always made. Debuggers serve to discover and help fixing them. This paper summarises some basic information to debugger development and describes implementation for processors created using the Lissom project.
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Implementation of Generic VLIW Processor in FPGA
Kuběna, Petr ; Přikryl, Zdeněk (referee) ; Husár, Adam (advisor)
VLIW processors are parallel computing devices that are used in embedded devices as well as in servers. My thesis contains description of this architecture. It is aimed at making and subsequently implementing design of custom general-purpose VLIW processor with wide range of configurable parameters. Operational implementation of such processor in VHDL which can be tested on FITkit platform is an integral part.
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Implementation of General Disassembler
Přikryl, Zdeněk ; Masařík, Karel (referee) ; Lukáš, Roman (advisor)
This thesis presents the process of creating disassembler for new designed processors. We demand automatic generation of the disassembler. Instruction set for processor is modeled by specialized language ISAC, which offers resources for description of the instruction set. For example it describes format of instruction in the assembly language or format of instruction in the binary form or behavior of this instruction. Internal model is coupled finite automata, which describes relation of textual form of the instruction and binary form of the instruction in formal way. The code of disassembler is generated from the internal model. This disassembler accepts program in binary code at the input and generate equivalent program in assembly language at the output.
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Profiler for Generic Simulators of Microprocessors
Wilczák, Milan ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
This thesis presents design and implementation of profiling tool for newly created microprocessors. For microprocessor description specialized language ISAC is used which describes processor resources, instruction set and behavior. Final profiler is an extension to existing simulator and can be used for optimizing of both processor and its applications. Principle of the profiler is generating events by simulator and processing these events into statistics.
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Emulator of Simple Processor
Kuzník, Petr ; Přikryl, Zdeněk (referee) ; Křoustek, Jakub (advisor)
Emulator will be designed as generic emulator. It should be capable of emulating versatile architectures. Each architecture will be stored in separate module implemented as dynamically linked dll libraries. Main goal is for the emulator to be generic and design its structure in a way, so that it would be possible to easily add new architecture modules and design these modules with already implemented abstractions. Primarily implemented architecture will be Commodore 64. It is a personal computer used mainly in USA during 1980s.
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Parsing Based on Multigeneration
Kyjovská, Linda ; Přikryl, Zdeněk (referee) ; Lukáš, Roman (advisor)
This work deals with syntax analysis problems based on multi-generation. The basic idea is to create computer program, which transforms one input string to n -1 output strings. An Input of this program is some plain text file created by user, which contains n grammar rules. Just one grammar from the input file is marked as an input grammar and others n -1 grammars are output grammars. This program creates list of used input grammar rules for an input string and uses corresponding output grammar rules for the creation of n -1 output strings. The program is written in C++ and Bison
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Modelling of M68000 Model Processor
Adamec, Ondřej ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
The goal of this bachelor's thesis is to create a model of Motorola 68000 processor using architecture description language CodAL and Codasip development environment. Architecture of the processor is presented and model structure is described. The result is a working model that has been tested to ensure its correctness.
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