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Deep Neural Networks Approximation
Stodůlka, Martin ; Mrázek, Vojtěch (referee) ; Vaverka, Filip (advisor)
The goal of this work is to find out the impact of approximated computing on accuracy of deep neural network, specifically neural networks for image classification. A version of framework Caffe called Ristretto-caffe was chosen for neural network implementation, which was extended for the use of approximated operations. Approximated computing was used for multiplication in forward pass for convolution. Approximated components from Evoapproxlib were chosen for this work.
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Automated Design Methodology for Approximate Low Power Circuits
Mrázek, Vojtěch ; Bosio, Alberto (referee) ; Fišer, Petr (referee) ; Sekanina, Lukáš (advisor)
Rozšiřování moderních vestavěných a mobilních systémů napájených bateriemi zvyšuje požadavky na návrh těchto systémů s ohledem na příkon. Přestože moderní návrhové techniky optimalizují příkon, elektrická spotřeba těchto obvodů stále roste díky jejich složitosti. Nicméně existuje celá řada aplikací, kde nepotřebujeme získat úplně přesný výstup. Díky tomu se objevuje technika zvaná aproximativní (přibližné) počítání, která umožňuje za cenu zanesení malé chyby do výpočtu významně redukovat příkon obvodů. V práci se zaměřujeme na použití evolučních algoritmů v této oblasti. Ačkoliv již tyto algoritmy byly úspěšně použity v syntéze přesných i aproximativních obvodů, objevují se problémy škálovatelnosti - schopnosti aproximovat složité obvody. Cílem této disertační práce je ukázat, že aproximační logická syntéza založená na genetickém programování umožňuje dosáhnout vynikajícího kompromisu mezi spotřebou a chybou. Byla provedena analýza čtyř různých aplikacích na třech úrovních popisu. Pomocí kartézského genetického programování s modifikovanou reprezentací jsme snížili spotřebu malých obvodů popsaných na úrovni tranzistorů použitelných například v technologické knihovně. Dále jsme zavedli novou metodu pro aproximaci aritmetických obvodů, jako jsou sčítačky a násobičky, popsaných na úrovni hradel. S využitím metod formální verifikace navíc celý návrhový proces umožňuje garantovat stanovenou chybu aproximace. Tyto obvody byly využity pro významné snížení příkonu v neuronových sítích pro rozpoznávání obrázků a v diskrétní kosinově transformaci v HEVC kodéru. Pomocí nové chybové metriky nezávislé na rozložení vstupních dat jsme navrhli komplexní aproximativní mediánové filtry vhodné pro zpracování signálů. Disertační práce reprezentuje ucelenou metodiku pro návrh aproximativních obvodů na různých úrovních popisu, která navíc garantuje nepřekročení zadané chyby aproximace.
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Autonomous Impedance Meter
Voda, Zbyšek ; Mrázek, Vojtěch (referee) ; Vašíček, Zdeněk (advisor)
This thesis deals with design of a smart embedded device for autonomous measurement of impedance optimized for measurement of biological materials. The goal is to create a device which provides a simple web interface which allows users to capture and further analyze measured data. The digital part is based on MT7688 SoC with WiFi capabilities. The analogue part utilizes a single-chip integrated solution AD5933 that is tightly coupled with a custom analogue frontend whose function is to modify the signal to avoid a potential damage of biological samples. The proposed device is able to either measure impedance for a single frequency or perform a frequency sweep across the whole range beginning at 50Hz and ending at 100 kHz. It supports common two-electrode probes as well as more precise four-electrode probes. The analogue frontend has been simulated using the SPICE simulator to avoid a potential design bug. The experimental evaluation shows that the achieved precision for the typical impedance of biological samples is better than 0.5%.
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A Mini-Cluster Based on Microcontroller Computing Nodes
Šídlo, Boleslav ; Mrázek, Vojtěch (referee) ; Bidlo, Michal (advisor)
The objective of this bachelor thesis is to investigate a low-cost computing cluster, composed of microcontrollers-based nodes, for parallel computing tasks. The work deals with the behaviour and limitations of the platform in various situations. Experiments were performed using 4 development boards equipped with 8-bit microcontrollers. I2C seriál interface was used for the communication between the nodes. The experiments were devoted to the comparison of computing times of a sequential algorithm (running on a single minrocontroller only) and the parallel version using the cluster. The results showed that the cluster can speed-up the computation of applications that does not require a high communication overhead. Moreover, the microcontrollers applied showed as unsuitable for floating-point computing if a high accuracy of the results is required.
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Application of Evolutionary Algorithms in Quantum Computing
Žufan, Petr ; Mrázek, Vojtěch (referee) ; Bidlo, Michal (advisor)
In this thesis, an evolutionary system for searching quantum operators in the form of unitary matrices is implemented. The aim is to propose several representations of candidate solutions and settings of the evolutionary algorithm. Two evolutionary algorithms were applied: the genetic algorithm and evolutionary strategy. Furthermore, a method of generating a unitary matrix is presented which is used for the first time for this task. This method is in some aspects better than the previous ones. Finally, a comparison of all used techniques is shown in experiments.
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Demonstration Examples for Pynq Z2 System on Chip Platfrom
Polášek, Patrik ; Mrázek, Vojtěch (referee) ; Kekely, Lukáš (advisor)
The thesis deals with the Pynq Z2 with SoC containing FPGA programmable logic connected to ARM processor. The main goal is to create a set of sample applications that use the peripherals available on the development board and perform critical computations on the FPGA. These applications take the form of a template dividing the functionality into a part communicating with the peripherals and another part implementing the actual computation algorithm. Specific algorithms were chosen from the areas of text search (Knuth-Morris-Pratt algorithm), image filtering (image color change and smoothing convolution mask), audio signal filtering (low pass), and internet packet classification (decision tree). The algorithms can be replaced with custom ones, while the surrounding interface for communication with the periphery is preserved. In addition to the implementation itself, an interactive Jupyter Notebook document is provided for each application with accompanying material to facilitate understanding of the subject matter.
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Deep Neural Networks: Embedded System Implementation
Matěj, Aleš ; Šimek, Václav (referee) ; Mrázek, Vojtěch (advisor)
The goal of this thesis is to firstly design and implement an application for embeddedsystems which will classify MNIST numbers and secondly optimize energy and memoryrequirements of this network. The basics of neural networks, Cortex-M processor cores andembedded devices are described in the theoretical part. Followed by implementation details.Networks learning is done with Python and Theano library on a PC. The network is thenconverted to C for a board STM32F429 Discovery. Last part consist of network optimization,which focuses on convolution, dot product and number representation of weights and biasesof the network.
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Neural Networks Classifier Design using Genetic Algorithm
Tomášek, Michal ; Vašíček, Zdeněk (referee) ; Mrázek, Vojtěch (advisor)
The aim of this work is the genetic design of neural networks, which are able to classify within various classification tasks. In order to create these neural networks, algorithm called NeuroEvolution of Augmenting Topologies (also known as NEAT) is used. Also the idea of preprocessing, which is included in implemented result, is proposed. The goal of preprocessing is to reduce the computational requirements for processing of benchmark datasets for classification accuracy. The result of this work is a set of experiments conducted over a data set for cancer cells detection and a database of handwritten digits MNIST. Classifiers generated for the cancer cells exhibits over 99 % accuracy and in experiment MNIST reduces computational requirements more than 10 % with bringing negligible error of size 0.17 %.
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Intelligent Energy Measurement Device
Mrázek, Vojtěch ; Sekanina, Lukáš (referee) ; Vašíček, Zdeněk (advisor)
The goal of this project is to design an energy measurement device that supports logging of historic values and offers simple analysis of the values. The proposed device enables to display actual quantities such as active and reactive power, current or even power factor. In addition to that, it also stores the energy profile that can be subsequently analysed. The device communicates locally via USB or remotely via Ethernet.
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