National Repository of Grey Literature 14 records found  1 - 10next  jump to record: Search took 0.01 seconds. 
Implementing Edge Clustering for Graphs
Klimčíková, Iveta ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
The objective of the thesis is to explore graph layout and edge clustering to improve graph visibility and the overall edge crossings. A summary of tools focusing on improving of graph visualisation is given. The thesis describes in more details a method of geometry--based edge clustering. Further, the method is implemented in a C++ library. The library itself can handle both simple and more complex graphs with a lot of vertices and edges.
A Tool for Automatic Generation of SQL Database Content for Software Testing
Minářová, Alice ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
This thesis follows up a design and implementation of a set of two tools for testing data generating. The first tool analyzes PostgreSQL databse text output and creates a configuration file in a newly designed language that describes how the database content should be generated. Based on this file the second tool generates a SQL script to fill the target database. User can adjust the generated data to their own requirements by modifying the configuration file written in a domain-specific language. The language was designed to make possible adjustments quick and intuitive. The thesis also describes how this language should be handled. The two tools were tested on several artificially created databases and also on a real system database of Drupal. The tools are both operated via the command line which makes them suitable for usage in automation.
A Language for Description of Instruction Sets
Forejtník, Jan ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
This bachelor's thesis introduces a simple concept of a language for description of microprocessor architecture, namely the instruction set. An interpreter of the language capable of simulating the behavior of the architecture is briefly described. This text may also serve as a manual for using the interpreter.
A Tool for Automated Testing of GUI
Vacek, Lukáš ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
Despite of GUI usability and availability is GUI testing quite new specialization technique. Manual testing is often used for verifying of GUI functionality. The aim of this work is to create a tool for testing and controling GUI. By tool is meant library for automated testing of GUI using object recognization method. Library detects basic GUI elements and controls them according to their standard behavior. Object detection depends on image processing and tracing graphic changes while mouse and key events are incoming.
An Extension of Support for Archives in GVFS
Holý, Ondřej ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
The bachelor thesis deals with an extension of archive daemon in GVFS system. The extension was designed, implemented, and tested based on an analysis of current state of the daemon, LibArchive library options, and similar projects. The main benefit of the extension is an easy manipulation with files in an archive via GIO API, which is used by many applications running in GNU/Linux operating system. Files and folders included in an archive can be read, renamed, moved, copied or deleted, it can also create empty directories. Daemon also allows creating new archives of a desired format.
Map Generator for Fantasy RPG
Pagáč, Antonín ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
The aim of this work is to develop a generator of maps used in fantasy role-playing games. The issues of map processing and map creation in real world are described. The work also discuss a number of approaches to map generation in computer games, mind games or board games. Next, a program based on generation of Voronoi diagram is presented, which serves as map creation software. The generator has the means to place objects on map randomly, using user commands, or place objects to specific place using graphical user interface. Generator is implemented in Javascript, which enables the program to be run in web browser on many different devices.
A CPU Emulator for Assembler Course
Charvát, Lukáš ; Nagy, Jan (referee) ; Smrčka, Aleš (advisor)
The bachlors's thesis discusses the design of a CPU architecture emulator aimed to assembly languages course. While most of nowadays emulators are architecture specific, this document describes an approach to create an emulator allowing users to easily set up their own architecture, to perform operations upon it, and to display its current state.
A CPU Emulator for Course of Assembly Languages
Charvát, Lukáš ; Samek, Jan (referee) ; Smrčka, Aleš (advisor)
The master thesis discusses the design of an emulator of a CPU architecture instruction set aimed at assembly languages course. While most of nowadays emulators are architecture specific, the emulator proposed in master thesis aims at education and better understanding of assembly languages. The emulator is not limited to a single CPU, but it easily allows defining a purpose-specific architecture and instruction set in order to perform operations upon it and to display its current state.
Application for Generating GUI Test Suite
Melo, Juraj ; Charvát, Lukáš (referee) ; Smrčka, Aleš (advisor)
This thesis describes a system for automated GUI testing using assistive technologies for accessing and manipulating GUI elements. The only input from the user to automated test system is a description of UI events and activities. For this purpose, a specialized language is proposed. The test system then automatically generates possible sequences of UI events applying a given criterion. Generated test set is executed by Python interpreter exploiting the Linux Desktop Testing Project (LDTP). Test system described in this thesis then provides reports and coverage evaluation for particular test cases and the whole test set.
An Interactive Simulator for Data-flow Graphs
Kovařík, David ; Smrčka, Aleš (referee) ; Charvát, Lukáš (advisor)
Data-flow graphs are often used by hardware designers. Such graph representation is also very useful for performing deeper analysis of a design (including functional or formal verification). Simulator presented in this thesis is a support tool for verification environment HADES. The goal of the simulator is to decrease necessary time and increase quality of the verification process. To perform a simulation efficiently, a specific simulation algorithm which saves computation time by eliminating redundant evaluations has been introduced. The simulator is equiped with several output interfaces connected to a single simulation core. One output interface provides direct simulation output in text format. The second is also textual, but allows user to control the simulation. Finally, the third forms a graphical interface that visualizes simulation results.

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2 Charvát, Lucie
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