Original title: Vytvoření modelu procesoru PowerPC
Translated title: Modelling of PowerPC Processor
Authors: Blaha, Hynek ; Dolíhal, Luděk (referee) ; Masařík, Karel (advisor)
Document type: Bachelor's theses
Year: 2013
Language: cze
Publisher: Vysoké učení technické v Brně. Fakulta informačních technologií
Abstract: [cze] [eng]

Keywords: architecture description language; CISC; CodAL; Codasip; instruction set; modelling; PowerPC; processor; RISC; simulation; toolchain; CISC; CodAL; Codasip; instrukční sada; jazyk pro popis architektury; modelování; PowerPC; procesor; RISC; simulace; toolchain

Institution: Brno University of Technology (web)
Document availability information: Fulltext is available in the Brno University of Technology Digital Library.
Original record: http://hdl.handle.net/11012/187467

Permalink: http://www.nusl.cz/ntk/nusl-412717


The record appears in these collections:
Universities and colleges > Public universities > Brno University of Technology
Academic theses (ETDs) > Bachelor's theses
 Record created 2020-07-11, last modified 2022-09-04


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